In a common manufacturing process of semiconductor devices a plurality of chips are manufactured in parallel. Here, the chip layout of the plurality of chips is patterned onto a wafer such that the singular chip areas are arranged side by side on the wafer and such that a semiconductor structure comprising integrated circuits (ICs) is formed in each chip area. The chip areas are separated by a scribeline line, also referred to as dicing line, which is typically metal free. At the end of this so called frontend process the wafer is cut or diced along the dicing lines in order to singulate the chips. This can, for example, be done by using a saw or by using stealth dicing (laser dicing).